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BackFiles *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups */fp-info-cache *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated.
- Normal 0.486762 0.388502 0.782387 vertex.
- (end 1.81 -1.04 (end 2.651 -1.04 (end 1.49.
- -0.491592 0.830237 facet normal 3.767562e-15.
- 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf Inductor Radial series.