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Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias in pads, 5 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator JST PH series connector, SM02B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf.

9.946929e-001 0.000000e+000 facet normal -0.0818217 -0.0820366 -0.993265.
0.225879 facet normal 0.290244 -0.950506 0.110892.
// drop to axis [left_edge, -extra_depth], // bottom.
-6.35807 3 vertex -6.36396 -6.36396.

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