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Branch bugfix/v1.1 Add note resulting from real TL0x4s re-re-remove the mysterious extra trace 4c5e03f875a81278be4b8089dd10dd98b0c86e5d Add scad for v3.2 3afa35e4b1 PCB initial layout.

• 0.262761 0.491592 0.830237 vertex -5.04122 7.99026 3.54602 vertex.
• -2.743735e-001 9.482117e-001 vertex -6.716304e-001.
• Standex-Meder MS SIL-relais, Form 1B.

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