3
1
Back

[QFN]; (see Microchip Packaging Specification 00000049BS.pdf, http://www.onsemi.com/pub/Collateral/NCP1207B.PDF 8-Lead Plastic DFN (5mm x 4mm) (see Linear Technology 05081733_A_DF12.pdf DFN12, 4x4, 0.65P; CASE 506CE (see ON Semiconductor 122BS.PDF PQFP, 100 Pin (JEDEC MO-153 Var EC-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP, 40 Pin (http://www.issi.com/WW/pdf/31FL3736.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 32 Pin (http://www.thatcorp.com/datashts/THAT_5171_Datasheet.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py HTSSOP56: plastic thin shrink small outline package; 24 leads; body width 4.4 mm; thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf HTSSOP, 16 Pin (https://www.st.com/resource/en/datasheet/tsv521.pdf), generated with.

New Pull Request