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-0.124598 -0.886057 0.446518 facet normal 0.900364 0.423669 0.099239 facet normal -0.633162 -0.0623609 0.771503 vertex -8.39715 1.6703 5.56266 facet normal 0.000000e+00 -1.000000e+00 facet normal -0.880555 0.472746 0.0336791 vertex 3.08479 -4.5363 21.833 vertex 4.44467 -3.03604 21.8214 facet normal -5.955815e-001 -2.856946e-003 8.032898e-001 vertex 5.168263e+000 2.960945e+000 2.490742e+001 facet normal 0.734383 -0.392551 0.553702 facet normal 0.688669 -0.165323 0.705976 facet normal -0.491592 0.262761 0.830237 facet normal 0.0827209 0.0808284 0.993289 vertex 4.28385 -5.77925 7.9151 facet normal 0.288583 -0.95132 0.108209 facet normal -3.934382e-001 6.745008e-001 6.247039e-001 vertex 1.376525e+000 -3.994463e+000 2.488700e+001 facet normal 0.63056 -0.768557 0.108238 facet normal 0.980752 -0.195255 -3.95367e-07 vertex -3.425 0 18.1498 vertex 3.16429 1.31069 6.59 vertex -2.69268 -2.0165 18.1498 facet normal 9.999901e-001 4.452774e-003 0.000000e+000 facet normal -0.100183 -0.114147 0.9884 facet normal 0.630673 -0.768469 0.108201 facet normal -8.984611e-14 -1.000000e+00 -4.846033e-14 facet normal 0.0723526 0.301372 0.950758 facet normal -0.0942732 -0.0305836 0.995076 vertex 7.75254 1.99375 19.95 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: ### Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 Experimenting with more panel layout 3bfacc0b86 Add main pdf Add main pdf Add main pdf f45c980890 Go to file 74231bd333 Port in fixes from v1.1 Checkpoint after converting most things to SMD Checkpoint after tweaking footprints some more, starting over at 14hp PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups Initial kicad, images, gitignore for kicad backups .gitignore | 65 Hardware/PCB/precadsr/precadsr.kicad_pro | 471 .../precadsr-panel-Gerbers/drill_report.rpt | 26 .../precadsr_panel_al-F_Cu.gbr | 15 .../precadsr_panel_al-NPTH.drl | 55 create mode 100644 HIHAT_MANUAL.pdf create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x08_P2.54mm_Vertical.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/C_Rect_L7.2mm_W2.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod delete mode 100644 Panels/title_test_22.stl Binary files /dev/null and b/3D.

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