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Path="/60A9C088" Ref="R?" Part="1" AR Path="/60802BB2" Ref="R?" Part="1" AR Path="/607ED812/60A9C081" Ref="R26" Part="1" AR Path="/607ED812/6091D1B4" Ref="S3" Part="1" AR Path="/6091D1B4" Ref="S?" Part="1" AR Path="/607ED812/607F01E7" Ref="R109" Part="1" AR Path="/607ED812/60A9C0A9" Ref="R11" Part="1" AR Path="/60800A40" Ref="R?" Part="1" AR Path="/607ED812/60802B98" Ref="R29" Part="1" AR Path="/607ED812/60970E37" Ref="S1" Part="1" AR Path="/607ED812/60A9C088" Ref="R30" Part="1" AR Path="/6091D1B4" Ref="S?" Part="1" AR Path="/60802BB2" Ref="R?" Part="1" AR Path="/607ED812/60A9C0A9" Ref="R11" Part="1" AR Path="/607ED812/6091D1B4" Ref="S3" Part="1" AR Path="/607ED812/60802BB2" Ref="R31" Part="1" AR Path="/607ED812/60A9C0A9" Ref="R11" Part="1" AR Path="/60802B98.

• (perimeter) array, NSMD pad definition Appendix A Virtex-7.
• Http://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/f32pm25.pdf TSOP I, 32.

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