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GP1212 (https://ww2.minicircuits.com/case_style/GP731.pdf) following land pattern PL-176, including GND vias (https://www.minicircuits.com/pcb/98-pl176.pdf Footprint for Mini-Circuits case GP1212 (https://ww2.minicircuits.com/case_style/GP731.pdf Footprint for Mini-Circuits case MMM168, Land pattern PL-225, vias included, (case drawing: https://ww2.minicircuits.com/case_style/MMM168.pdf, land pattern PL-230, including GND vias (https://www.minicircuits.com/pcb/98-pl176.pdf Footprint for Mini-Circuits case TTT167 (https://ww2.minicircuits.com/case_style/TTT167.pdf Footprint for Mini-Circuits case MMM168, Land pattern PL-094, pads 5 and 6); middle of panel after deducting left/right sub-panels slider_center = (width_mm - left_panel_width - right_panel_width)/2 + left_panel_width; slider_bottom = v_margin+8; Panels/10_step_seq_38hp_v1.scad Normal file View File # ENV Envelope generator main VCA/Schematics/Dual_VCA_with_cv2_OTA.diy 7462 lines PSU/Synth Mages Power Word Stun Panel.kicad_prl", Synth Mages Power Word Stun.kicad_pro Add scad for v3.2 3afa35e4b1 PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups afea9d5a2c Final revision; added custom DRC as project file version 1) #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'pad' && B.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View.

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