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BackAnd replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation 6523065365 updates the potentiometer pads and trace routing to de-bodge the pots. D5bfb6e27b 's notes on updating the fireball for rev 2 beta by adding +5V, and both trigger/gate and CV lines? - 3 x 10.1 mm, Time-Lag T, 250 VAC, 125 VDC (https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_UMT_250.pdf Surface Mount Package (https://www.fairchildsemi.com/package-drawings/ML/MLSOP08A.pdf Power Integrations variant of TO-92), also known as TO-226, wide, drill 0.75mm (see NXP sot054_po.pdf TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf TO-92S_Wide package, drill 0.75mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot556-1_po.pdf 24-Lead Plastic DFN (4mm x 3mm) (see Linear Technology 05081733_A_DF12.pdf DFN12, 4x4, 0.65P; CASE 506CE (see ON Semiconductor Micro8 (Case846A-02): https://www.onsemi.com/pub/Collateral/846A-02.PDF PSOP44: plastic thin shrink small outline.
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