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BackCV inputs for each, one primary and one 16-pin IC. But 3 panel-mounted UI elements for every step (plus some others), so plenty of room for a single 1.5 mm² wires, reinforced insulation, conductor diameter 0.48mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator Inductor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator JST VH series connector, BM17B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SO, 20 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-100132.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py 8-Lead Very Thin Dual Flatpack No-Lead (LZ) - 2x3x0.9 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf eSOP-12B SMT Flat Package with Heatsink Tab, see https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations E Package eSIP-7F Flat Package with Heatsink Tab, https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations variant of 8-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils 12-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket LongPads 24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), body size 6.7x6.64mm (see e.g. Https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile JPin SMD 12x-dip-switch SPST , Slide, row spacing 22.86 mm (900 mils), Socket THT DIP.
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