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Align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter instead of latch.

• -7.027760e-01 vertex -1.053395e+02 9.725134e+01.
• SW_DIP_x11 SW 0 40 Y.
• -0.0820856 -0.993242 facet normal 2.806319e-02 -9.996062e-01.

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