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BackLayer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File Panels/fireball_vco_14hp_v1.scad Normal file Unescape Hardware/Panel/precadsr-panel/fp-lib-table Normal file Unescape
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