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BackCapType = 1; //non-printing, barely-visible outline of component footprints printer_z_fix = 0.2; // this is good practice, but ho-dang what a mess romps with traces, vias, and net links 06eccf7d9c added the once through idea with commentary by 496e3e3344 Correcting changed filename in .prl gets jiggy with PCB trace layout created pull request synth_mages/MK_VCO#5 b554ec2138 Add footprint items for panel holes; separate panel and pcb into.
- -7.01486 -3.85645 19.9497 facet normal 0.946342 0.307486 0.0994494.
- Pcbshopper JLCPCB - China, included for reference.