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V1 and v2

Added schmancy pcb for v1 front panel design and includes 2.5mm centerward shift for input and send reset to clk_inh to stop progressing Add cascading input and output jacks tweaks layout with input from sam 52b504dd7c Delete 'Panels/futura medium condensed bt.ttf 935360b933 Delete '3D Printing/Panels/FIREBALL VCO.png' # precadsr.sch BOM Mon 19 Apr 2021 12:09:41 PM EDT Generated from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 | Refs | Qty | Component | Description | Vendor | SKU | | | | | D1, D2 | 2 | 10R | Resistor | | | | R24, R26, R28 | 3 | 2N3904 | Small Signal NPN Transistor, TO-92"/> See http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix.
  • DO-41_SOD81 series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=14*4.5mm^2.
  • Walls; i.e. The thickness of the label font.
  • New Pull Request