Labels Milestones
BackTo user drawings Hardware/PCB/precadsr/potsetc.sch | 663 Hardware/PCB/precadsr/precadsr.net | 147 Hardware/PCB/precadsr/precadsr.pro | 22 Hardware/PCB/precadsr/precadsr.sch | 412 Hardware/PCB/precadsr/precadsr.xml | 1656 create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/SOT-23_Handsoldering.kicad_mod delete mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-NPTH.drl create mode 100755 Panels/FireballSpell.dxf create mode 100644 Hardware/Panel/precadsr-panel/precadsr-panel.pretty/Bigger_Push_Switch_Hole.kicad_mod create mode 100644 Datasheets/tl074-pinout.jpeg false 500k Trimpot; tune to 1V out 3D Printing/AD&D 1e spell names in Filmoscope Quentin' Latest commits for file Schematics/Luthers_Perfboard.pdf From aa68d7a21dc81e7382706897022ddc81b9f5db22 Mon Sep 17 00:00:00 2001 .../Panels/COLOR SPRAY.png | Bin 37432 -> 0 bytes From 811ef45c764021f623b8bb59234df1314fce4e91 Mon Sep 17 00:00:00 2001 Subject: [PATCH 04/18] adds front panel 24ca7abc85681936397a2802c8155420fcaf679c Added schmancy pcb for v1 build Schematics/bad_trace_v1.jpeg Normal file View File 3D Printing/Cases/Eurorack 2-Row/2row_frame.stl Executable file Unescape Schematics/SynthMages.pretty/POT_2_PIN_Header.kicad_mod Normal file Unescape Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pretty/precadsr-panel-art.kicad_mod Normal file Unescape 3D Printing/Pot_Knobs/scaled_french_pot.mix | Bin 0 -> 23847 bytes Panels/FireballSpell_Large.webp | Bin 0 -> 11692 bytes .../Panels/HOLD PORTAL.png | Bin 0 -> 38764 bytes .../Font files/futura medium bt.ttf Latest commits for file Panels/luther_triangle_vco_quentin_v4.scad Replaced accidentally dropped Fine tuning hole. Main synth_tools/Schematics/SynthMages.pretty/P160_pot_hole_nonpcb.kicad_mod 24 lines Binary files /dev/null and b/3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png' d48d677c91 Delete '3D Printing/Panels/BLADE BARRIER.png' AD&D 1e type faces Final revision; added custom DRC as project file (pts Final revision; added custom DRC as project file tstamp 60305f7c-b08f-48d5-a3e4-4d4a9046f92f) Final revision; added custom DRC as project file tstamp eb945be1-4d1d-46b5-b945-d4ebde74dae2) Final revision; added custom DRC as project file Merge issues to be able to add picture 9f9f6acf76 Add notes about UX component wiring Feed.
New Pull Request