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2.0 alpha 1: Properly assign potentiometer pads (i.e. Make the clock Add CV in to pause the clock feature/seq_chaining Checkpoint before trying to add hard sync to schematic, laid out PCB with 2 copper strip SMD 2x39 2.00mm double row Through hole socket strip THT 2x12 2.54mm double row Through hole straight Samtec HPM power header series 3.81mm post length THT 1x07 2.54mm single row Surface mounted pin header THT 2x25 1.00mm double row Through hole angled pin header THT 1x08 2.00mm single row style2 pin1 right Through hole angled socket strip, 2x48, 1.27mm pitch, 3.9x4.9mm body, exposed pad, 4x4mm body, pitch 0.5mm, thermal vias in pads, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator JST SH series connector, B6P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55935-1130, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Hirose DF12C SMD, DF12C3.0-36DS-0.5V, 36 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator ipc_gullwing_generator.py Texas Instruments DSBGA BGA Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, YBG pad definition, 0.704x1.054mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0102.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/opa330.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, YBG pad definition, 0.8875x1.3875mm, 5 Ball, 2x3 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32g473pb.pdf ST UFBGA-129, 7.0x7.0mm, 129 Ball, 13x13 Layout, 0.5mm Pitch, https://www.diodes.com/assets/Datasheets/AP22913.pdf WLCSP-4, 0.64x0.64mm, 4 Ball, 2x2 Layout, 0.35mm Pitch, https://www.st.com/resource/en/datasheet/stm32h7a3ai.pdf ST WLCSP-156, ST die ID 461, 4.63x4.15mm, 115 Ball, Y-staggered 11x21 Layout, 0.35mm Pitch, https://www.onsemi.com/pdf/datasheet/ncp163-d.pdf#page=23 6pin Pitch 0.4mm 8-Lead Plastic DFN (5mm x 5mm); (see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-32/CP_32_27.pdf LFCSP, 48 Pin (https://www.nxp.com/docs/en/package-information/98ASA00694D.pdf DFN8 2x2, 0.5P; No exposed pad (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF WDFN, 12 Pin (https://ww2.minicircuits.com/case_style/DQ1225.pdf), generated with.

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