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Back0.403619 0.491815 0.771499 vertex 4.7566 7.11876 5.56266 facet normal -0.881921 -0.471397 0 vertex -5.00013 7.48323 3 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 v1.0 Add CV in to pause the clock Add CV (and knob) controlled glide to schematic 16c50fa0a8 Add pulldown resistors for reset debounce cap; formatting checkpoint before trying to implement chaining Checkpoint before trying to add glide db7d02719b Find and replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation 6523065365 updates the potentiometer pads and trace routing to de-bodge the pots. 6523065365c12ceda76dbda25c5041018c73eb63 's notes on repique/caixa, two or three for surdos