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On Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Schematics/SynthMages.pretty/SLIDE_POT_0547.kicad_mod Normal file View File 3D Printing/Pot_Knobs/18-spline-pot-knob-indicator-line.stl Executable file View File Panels/Font files/futura medium condensed bt.ttf differ Binary files /dev/null and b/3D Printing/Panels/BLADE BARRIER.png | Bin 0 -> 11930 bytes 3D Printing/Panels/FIREBALL VCO.png and /dev/null differ From a3935f450bd1ef1834b2de14643fc2be5f29e67e Mon Sep 17 00:00:00 2001 Subject: [PATCH] Delete 'Panels/futura medium bt.ttf' Panels/futura medium bt.ttf | Bin 16700 -> 0 bytes From 8a9583e7df3009c52174c16ce501729b9c90d7ac Mon Sep 17 00:00:00 2001 Subject: [PATCH] More cleanup Schematics/Fireball.kicad_sch | 4790 Schematics/Fireball_VCO.pdf | Bin 0 -> 12821 bytes .../Panels/COLOR SPRAY.png | Bin 0 -> 317907 bytes Images/PXL_20210831_004139245.jpg | Bin 0 -> 86371 bytes rename 3D Printing/{ => Cases}/6u_wing_v1.scad | 0 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_pcb | 4 | 47k | Resistor | | | | | | Tayda | A-553 | | Tayda | A-804 | | J2 | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-14/SOIC-14 | | Tayda | A-1955 | | | 14 ...ther_triangle_vco_quentin_v3_blank.stl.stl | Bin 0 -> 11930 bytes create mode 100644 Hardware/PCB/precadsr/potsetc.kicad_sch delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-8_W7.62mm_Socket_LongPads.kicad_mod create mode 100644 .gitignore create mode 100644 Hardware/Panel/precadsr-panel/precadsr-panel.kicad_pro create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/MountingHole_3.2mm_M3.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/SolderWirePad_1x01_Drill1mm.kicad_mod delete mode 100644.

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