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*~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/DPDT-toggle-switch-1M-seriesx.kicad_mod Normal file View File 3D Printing/Cases/Eurorack Modular Case/image004k.jpg Executable file View File Hardware/PCB/precadsr_Gerbers/precadsr-B_Mask.gbr Normal file Unescape Fireball/Fireball.kicad_sch Normal file Unescape Hardware/Panel/precadsr-panel/fp-lib-table Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod Normal file Unescape 500k Trimpot; tune to 1V out HALF Dot1 Dot2 Dot3 Dot4 Dot5 Dot6 Dot7 Dot8 Dot9 Dot10 Dot11 Dot12 Dot13 W1 L2 <-- CV In - ~27K to U3-8? No, transistors maybe activate? - Clock rate goes down when resistance goes up, opposite to expectation. Schematic fixes: Trim 5mm from vertical for both panels, to make fitting inside a case easier. Or 10mm if it can fit; losing the bodge area. Outs: Clock Out - 1K to U3-7 Glide section not working right, just pegging the output to allow faster previews. Influences segments for a few more 'simple' Unseen Servant Primary source: Two switch selectable capacitors for slower and faster time scales (restoring a feature of the plastic walls. Clf_wall = 2; // surface("FireballSpellSmall.png", center=true, invert=false); More experimentation with panel title fonts } STLs, 10hp version, others schematics b404e3f9c5 Update luther's layout Update luther's layout

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