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The 3PDT I used appears to be +1mm between legs -- Don't put R8 so close to R26 -- D36/R47 too close - Trim 5mm from vertical for both panels, to make fitting inside a case easier. Or 10mm if it can fit; losing the bodge area. Outs: Clock Out - 1K to TP5 Gate Out - Diode from rotary pin 13? CV Out - 1K to U3-7 Glide section not working right, just pegging the output jacks output_column = width_mm - thickness*2.5 - tolerance*6; out_row_1 = v_margin+12; out_row_2 = working_increment*1 + row_1; row_3 = row_2 + vertical_space/7; row_4 = working_increment*3 + row_1; row_5 = row_4 + vertical_space/7; row_5 = row_4 + vertical_space/7; cv_in_1a = [left_col, row_5, 0]; cv_in_2a = [left_col, row_5, 0]; audio_out_1 = [right_col, row_7, 0]; manual_1 = [left_col, row_2, 0]; pwm_in = [input_column - h_margin/2, bottom_row, 0]; pwm_pot = [input_column - h_margin/2, bottom_row, 0]; pwm_duty = [width_mm - h_margin - working_width/8, row_2, 0]; triangle_out = [output_column, row_2, 0]; pwm_in = [first_col, fourth_row, 0]; //Fifth row interface placement f_tune = [width_mm/2 + h_margin, top_row, 0]; f_tune = [width_mm/2 + h_margin, top_row, 0]; scale([.38,.38,-.005]) surface("FireballSpellVertSmaller.png", center=true, invert=false); } module knurled_finish(ord, ird, lf, sh, fn, rn) { for(j=[0:rn-1]) assign(h0=sh*j, h1=sh*(j+1/2), h2=sh*(j+1)) { for(i=[0:fn-1]) assign(lf0=lf*i, lf1=lf*(i+1/2), lf2=lf*(i+1)) { polyhedron( points=[ [ 0,0,h0], [ ord*cos(lf0), ord*sin(lf0), h2], [ ird*cos(lf1), ird*sin(lf1), h2], [ ird*cos(lf1), ird*sin(lf1), h2], [ ord*cos(lf2), ord*sin(lf2), h2] echo(" Knurled Surface Library v2 "); echo(" k_cyl_od - [ 3 ] ,, Knurl's Surface Smoothing : File donwn the top of the rail + a safety margin // margins from edges h_margin = hole_dist_side + thickness; right_rib_x = width_mm.

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