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Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces PCB initial layout, no traces }, More tweaks after pro review "different_unit_footprint": "error", "different_unit_net": "error", "duplicate_reference": "error", "duplicate_sheet_names": "error", More tweaks after pro review "different_unit_footprint": "error", "different_unit_net": "error", "duplicate_reference": "error", "duplicate_sheet_names": "error", More tweaks after pro review "design_settings": { "defaults": { PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces Fireball/Fireball.kicad_prl | 4 | 1M | Resistor | | | | | | | | D3, D4, D5, D8, D9, D10 | 8 pin SIM connector for 1.6mm PCB's with 40 contacts (polarized Highspeed card edge connector for 2.4mm PCB's with 60 contacts (not polarized Highspeed card edge connector for PCB's with 05 contacts (not polarized Highspeed card edge connector for PCB's with 50 contacts (not polarized Highspeed card edge connector for.

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