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FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb15cc.pdf#page=119 ST WLCSP-52, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, https://www.ti.com/lit/ds/symlink/dac80508.pdf Analog LFCSP, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator JST PHD series connector, S3B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py TSSOP, 44 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator JST XA series connector, LY20-28P-DT1, 14 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf.

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