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Updates Add circuit blocks to kick drum schematic Add CV in to pause the clock rate? Possible in the node_modules and vendor directories are externally maintained libraries used by Diodes Incorporated PowerDI3333-8, Plastic Dual Flat No-Lead Package, Body 3.0x3.0x0.8mm, Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 2x4 (perimeter) array, NSMD pad definition Appendix A Artix-7 BGA, 19x19 grid, 10x10mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf WLCSP-36, 6x6 raster, 2.61x2.88mm package, pitch 0.5mm UFBGA-64, 8x8 raster, 5x5mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f405og.pdf WLCSP-100, 10x10 raster, 8x8mm package, pitch 0.8mm; http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#p495 TFBGA-216, 15x15 raster, 13x13mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=80, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, YBG pad definition, 0.8875x1.3875mm, 5 Ball, 2x3 Layout, 0.5mm Pitch, https://www.diodes.com/assets/Datasheets/AP22913.pdf WLCSP-4, 0.64x0.64mm, 4 Ball, 2x2 Layout, 0.5mm Pitch, https://www.nxp.com/docs/en/package-information/98ASA00869D.pdf#page=1 MAPBGA 14x14x1.18 PKG, 14.0x14.0mm, 289 Ball, 17x17 Layout, 0.8mm Pitch, https://www.nxp.com/docs/en/package-information/98ASA00855D.pdf#page=1 TFBGA-196, 11.0x11.0mm, 196 Ball, 14x14 Layout, 0.75mm Pitch, http://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-Sheet-DS60001476C.pdf#page=2956 FBGA-78, 10.6x7.5mm, 78 Ball, 9x13 Layout, 0.8mm Pitch, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-bga/05081600_0_bga49.pdf https://www.analog.com/media/en/technical-documentation/product-information/assembly-considerations-for-umodule-bga-lga-package.pdf BGA 324 0.8 CS325 CSG235 Spartan-7 BGA, 18x18 grid, 15x15mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=270, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, YBG pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l4p5ve.pdf ST WLCSP-115, ST die ID 495, 4.4x4.38mm, 100 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.4mm; see section 6.2 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-100, 10x10, 9x9mm package, pitch 0.5mm (http://www.analog.com/media/en/package-pcb-resources/package/56702234806764cp_24_3.pdf, http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5801.pdf LFCSP VQ, 48 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/ PowerPAK SO-8L Single (https://www.vishay.com/docs/64721/an913.pdf SOP, 16 Pin (http://www.ti.com/lit/ds/symlink/tlv62095.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py 20-Lead Plastic Thin Quad Flatpack (PT.

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