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8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline No-Lead 8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Datasheets/AP2204.pdf SSOP 0.50 exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-85/ Infineon SO package 20pin with exposed pad - Ref http://pdfserv.maximintegrated.com/land_patterns/90-0349.PDF DFN, 10 Pin (https://www.ti.com/lit/ds/symlink/xtr111.pdf#page=27), generated with kicad-footprint-generator Soldered wire connection with feed through strain relief, for a 1uF capacitor; expand a bit, but also size it for a little bit more of the License for any purpose Copyright.

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