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7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes.

Vertex -5.69312 1.19444 21.335.
Normal -0.920075 -0.0458094 0.389053.
(http://www.ti.com/lit/ds/symlink/lp2951.pdf#page=27), generated with kicad-footprint-generator connector TE MATE-N-LOK.
Length*diameter=29*13mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf CP.
26014376 -> 26031216 bytes .

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