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X="4.0" y="3.6"/> Update luther's layout Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add design rules for jlcpcb Add design rules for jlcpcb Add some perfboard sections, power headers, teardrops .../Unseen Servant/Unseen Servant.kicad_sch | 864 Schematics/Unseen Servant/fp-info-cache | 1 | B10k | Potentiometer | | | U3 | 1 | TL071 | Operational amplifier, DIP-8 | | | R5, R29 | 3 | 10 uF.

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