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Back|| B.Type == A.Type")) # 4-layer condition "A.Type == 'track'" (condition "A.isPlated() && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == 'track'" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16 Not plated through holes: ============================================================= 2bd01a1ff2d30ca3cff647bbf3b80645437cc07c start 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be More SR1.
- -0.0788046 -0.996879 facet normal.
- -3.18942 -7.69994 5.74921 facet normal 4.264776e-001.
- 20.32mm 2W length 11.9mm diameter.
- 7.62mm length 5.2mm diameter 2.7mm Diode, A-405 series.
- Judged legally invalid or.