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Review "extra_units": "error", "global_label_dangling": "warning", "hier_label_mismatch": "error", "label_dangling": "error", "lib_symbol_issues": "warning", More tweaks after pro review Apply jlcpcb's design rules, small fixes for those couple more minor clearance tweaks Add ground fills, fix some clearance issues, add PCB slot, more options for potentiometer spoke placement From b96c823428337e1169ae4a0f1d50e46562744447 Mon Sep 17 00:00:00 2001 Subject: [PATCH 08/18] couple more minor clearance tweaks Add ground fills, fix some clearance issues, add PCB slot, more options for potentiometer spoke placement From b96c823428337e1169ae4a0f1d50e46562744447 Mon Sep 17 00:00:00 2001 Subject: [PATCH] romps with traces, vias, and net links romps with traces, vias, and net links 06eccf7d9c added the once through idea with commentary by Correcting changed filename in .prl gets jiggy with PCB locator, 2 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with.

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