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Period. 1 Unresolved Conversation # Temporary files fp-info-cache # Netlist files (exported from Pcbnew) *.dsn *.ses Latest commits for file Panels/dual_vca.scad T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= c9e81f0cc630cea052574ce7c50b3e82145bb626 Image of caxia score Fireball/Fireball.kicad_dru Normal file Unescape Hardware/PCB/precadsr_Gerbers/precadsr-job.gbrjob Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alps_RK163_Single_Horizontal.kicad_mod Normal file Unescape Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CuBottom.gbl Normal file View File 3D Printing/Panels/EurorackPanel.scad Executable file View File 3D Printing/Cases/Eurorack Modular.

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