synth_tools

Back

X="2.4" y="3.6"/> Update luther's layout Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: merged pull request 'Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | Tayda | A-2939 | | C1 | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-8/SOIC-8/TO-99-8 | | | J9 | 1 | 100k | Resistor | | C1, C11 | 3 | A1M | Potentiometer | | | | R25, R27, R29 | 3 | 4.7k | Resistor | | | | R1, R2, R23, R24 R3, R21, R27, R28 | 3 | 2N3904 | 0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92 R16, R17, R19, R20 **Potentiometer, 9 mm pots, you're on your own! * The first Fireball run used.

New Pull Request

Labels Milestones