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20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: merged pull request synth_mages/MK_VCO#2 21e2abea62 Merge pull request 'new_footprints' (#5) from new_footprints into main 1705ad98fb Put title box in PDF export 45cf8c00cd.

• 9.8813 2.19603 vertex 0.388301.
• 0.630656 -0.76848 0.108218 facet normal 0.995184 -0.0980262 9.21874e-06.
• Synth_tools/Schematics/SynthMages.pretty/Switch.dcm 352 lines main ENV/Envelope/Envelope.kicad_pcb 2.

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