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Close Testing before powering up: Clock In Normal - 1k to U2-8 (AND NOT short to U2-10 - Clock Rate - variable resist.

• B/Images/loop.png differ Binary files /dev/null and b/3D.
• Git clone git@github.com:holmesrichards/precadsr.git git clone --recurse-submodules git@gitlab.com:rsholmes/precadsr.git.
• 0.747986 -0.192839 0.635083 facet normal -0.368125 -0.929776 0.
• SIP, (https://www.xppower.com/pdfs/SF_ITX.pdf), generated with kicad-footprint-generator.

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