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007cc05932dfa23f85127799f5505afc7b25772e Stuff all teh scad files in aac0a4a5b4 Notes from debugging Clock POT is.

• Normal 0.551953 -0.109791 -0.826616 facet normal -8.966089e-01.
• 8.840644e-01 vertex -1.051415e+02 9.695134e+01 9.151071e+00 vertex -1.050340e+02 9.665134e+01.

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