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BackFrom f5e6b8a4df714a1a2bca4fe779760c14f25ac698 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces PCB initial layout, no traces Fireball/Fireball.kicad_prl | 4 812d609d12 More assembly notes 812d609d12a788e600a582b2b6e7494f6d2b0728 More mounting hole 4.3x6.2mm m4 Mounting Hole 4.3mm, no annular, M4, DIN965 mounting hole 5.3mm m5 din965 Mounting Hole 4.5mm, no annular m5 iso7380 Mounting Hole 5.3mm, M5, ISO7380 mounting hole position tweaks Messing around with panel title fonts From aa85775b4759021aae3f9b898bf346f9066d11e7 Mon Sep 17 00:00:00 2001 Subject: [PATCH] More repo cleanup, adopt github .gitignore file f45c980890 Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Align panel to PSU PCB (will affect choice of sitching hardware). Consider aesthetics and prcticality of stand-offs from front panel. Current design uses six IDC 2×8 connectors with 4 positions D 2 pin Molex connector 2.54 mm spacing | Tayda | A-1605 | | | Tayda | A-553 | | | C1 | 1 | B10k | Potentiometer | | | | | | | | C10 | 1 | ICM7555xP | CMOS General Purpose Timer, 555 compatible, PDIP-8"/>