3
1
Back

40 Pin (http://www.ti.com/lit/ds/symlink/drv8308.pdf#page=56 JEDEC MO-220 variation VGGC), generated with kicad-footprint-generator ipc_noLead_generator.py 16-Lead Lead Frame Chip Scale Package LFCSP (5mm x 4mm) (see Linear Technology DFN_16_05-08-1732.pdf DHC.

New Pull Request