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10 Ball, 3x4 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32g473pb.pdf ST UFBGA-129, 7.0x7.0mm, 129 Ball, 13x13 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST UFBGA-73, 5.0x5.0mm, 73 Ball, 9x9 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb15cc.pdf#page=119 ST WLCSP-52, ST die ID 456, 1.94x2.4mm, 20 Ball, 4x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g051f8.pdf#page=102 ST WLCSP-25, ST die ID 471, 4.437x4.456mm, 100 Ball, 10x10 Layout, 0.4mm Pitch, YFF0006, NSMD pad definition Appendix A BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 3x4 Layout, 0.5mm Pitch, 0.3mm Ball, http://www.st.com/resource/en/datasheet/stm32l486qg.pdf UFBGA-144, 12x12 raster, 7x7mm package, pitch 0.35mm; see section 6.2 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-100, 10x10, 9x9mm package, pitch 0.5mm; see section 6.6 of http://www.st.com/resource/en/datasheet/DM00273119.pdf X1-WLB0909, 0.89x0.89mm, 4 Ball, 2x2 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/tps63000.pdf 3x3mm Body, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32g473pb.pdf ST UFBGA-129, 7.0x7.0mm, 129 Ball, 13x13 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, 0.822x1.116mm, 5 bump 2x1x2 array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/ts5a3159a.pdf Texas Instruments (see http://www.ti.com/lit/ds/symlink/lm5118.pdf HSOIC, 8 Pin (https://www.st.com/resource/en/datasheet/ld1086.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py 8-Lead Plastic DFN (2mm x 2mm) (see Linear Technology 1956f.pdf TSSOP, 16 Pin (https://www.haloelectronics.com/pdf/discrete-ultra-100baset.pdf), generated with kicad-footprint-generator Hirose series connector, SM11B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py TSSOP, 56 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001734B.pdf#page=50), generated with kicad-footprint-generator ipc_gullwing_generator.py MSOP, 16 Pin package with pin 2 and 13 removed for voltage clearance (UCC256301, https://www.ti.com/lit/ds/symlink/ucc256301.pdf SOIC, 14 Pin (JEDEC MO-153 Var CA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with.

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